In a standard machine language instruction, which component identifies the specific operation to be performed, such as addition or data movement?

Structure of Instructions in CPU — Preparation

This question tests your understanding of Structure of Instructions in CPU, a key topic in the Computer Awareness section. The detailed solution above uses a step-by-step approach to show the reasoning, and where available, a shortcut that helps you solve similar questions in under 90 seconds during the actual exam.

This topic covers how a CPU actually executes a program. Every instruction passes through the instruction cycle: fetch the instruction from memory, decode it, execute it, and store the result. An instruction is made up of an operation code (opcode), which says what to do, and operands, which say what data to use. The topic also covers instruction formats (zero-, one-, two- and three-address instructions), addressing modes (immediate, direct, indirect, register, indexed and relative addressing), and important registers such as the program counter (PC), instruction register (IR), memory address register (MAR) and memory data register (MDR). Exam questions test which register holds the address of the next instruction (the program counter), the stages of the instruction cycle, and identifying the addressing mode used in an example instruction. Basic ideas of RISC and CISC architectures are also asked. Practise the instruction structure questions below. Each answer includes an explanation.