NIMCET 2020
The time required for fetching and execution of one simple machine instruction is known as
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Answer: Option B — CPU cycle
Detailed Solution
The time to fetch and execute one simple machine instruction is the CPU (machine or instruction) cycle.
Seek time is the time a disk head takes to reach a track, delay time is a general term, and real time describes systems that must respond within fixed deadlines.
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Ask a doubtMore Structure of Instructions in CPU Questions
View all ›- Q1.Which of the following statements about the fetch–decode–execute cycle in a CPU are correct?
- Q2.A CPU uses a 16-bit instruction format. If 4 bits are used for the opcode and the remaining bits specify a single memory address, what is the maximum addressable memory space for this instruction format?
- Q3.In a standard machine language instruction, which component identifies the specific operation to be performed, such as addition or data movement?
- Q4.Which register in a CPU holds the address of the next instruction to be executed?
- Q5.What does the term RISC stand for in computer architecture?
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Structure of Instructions in CPU — Preparation
This question tests your understanding of Structure of Instructions in CPU, a key topic in the Computer Awareness section. The detailed solution above uses a step-by-step approach to show the reasoning, and where available, a shortcut that helps you solve similar questions in under 90 seconds during the actual exam.
This topic covers how a CPU actually executes a program. Every instruction passes through the instruction cycle: fetch the instruction from memory, decode it, execute it, and store the result. An instruction is made up of an operation code (opcode), which says what to do, and operands, which say what data to use. The topic also covers instruction formats (zero-, one-, two- and three-address instructions), addressing modes (immediate, direct, indirect, register, indexed and relative addressing), and important registers such as the program counter (PC), instruction register (IR), memory address register (MAR) and memory data register (MDR). Exam questions test which register holds the address of the next instruction (the program counter), the stages of the instruction cycle, and identifying the addressing mode used in an example instruction. Basic ideas of RISC and CISC architectures are also asked. Practise the instruction structure questions below. Each answer includes an explanation.