NIMCET 2023 · NIMCET 2024
A CPU generates 32-bit virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128 page table entries and is 4-way set associative. The minimum size of the TLB tag is
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Answer: Option D — 15 bits
Detailed Solution
Page size KB bytes, so the offset is 12 bits and the virtual page number is bits.
sets, so the set index takes bits.
Tag bits.
✓ Check
bits, the full virtual address.⚠ Common trap
(A) 20 bits is the whole page number, which would be the tag only for a fully associative TLB.Quick tip
Offset 12 bits, page number 20 bits; sets (5 index bits); tag
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Operating System Advanced — Preparation
This question tests your understanding of Operating System Advanced, a key topic in the Computer Awareness section. The detailed solution above uses a step-by-step approach to show the reasoning, and where available, a shortcut that helps you solve similar questions in under 90 seconds during the actual exam.
This topic covers the deeper operating system concepts tested in MCA entrance exams. It includes processes and threads, process states, CPU scheduling algorithms (FCFS, SJF, priority and round robin), and measures such as waiting time and turnaround time. It also covers process synchronisation, semaphores, deadlock (its four necessary conditions, prevention, avoidance with the banker's algorithm, and detection), and memory management techniques such as paging, segmentation, virtual memory and page replacement algorithms (FIFO, LRU and optimal). Numerical questions on scheduling and page replacement appear regularly. Drawing a Gantt chart for scheduling questions and a frame table for page replacement questions makes them straightforward. Remember that the four necessary conditions for deadlock are mutual exclusion, hold and wait, no preemption, and circular wait. Practise the advanced operating system questions below, each with a step-by-step solution.