Structure of Instructions in CPU Questions with Solutions
This topic covers how a CPU actually executes a program. Every instruction passes through the instruction cycle: fetch the instruction from memory, decode it, execute it, and store the result. An instruction is made up of an operation code (opcode), which says what to do, and operands, which say what data to use. The topic also covers instruction formats (zero-, one-, two- and three-address instructions), addressing modes (immediate, direct, indirect, register, indexed and relative addressing), and important registers such as the program counter (PC), instruction register (IR), memory address register (MAR) and memory data register (MDR). Exam questions test which register holds the address of the next instruction (the program counter), the stages of the instruction cycle, and identifying the addressing mode used in an example instruction. Basic ideas of RISC and CISC architectures are also asked. Practise the instruction structure questions below. Each answer includes an explanation.
- Q1.
A CPU uses a 16-bit instruction format. If 4 bits are used for the opcode and the remaining bits specify a single memory address, what is the maximum addressable memory space for this instruction format?
A. 4096 locationsB. 1024 locationsC. 65536 locationsD. 16 locationseasyAsked in NIMCET 2026View solution › - Q2.
In a standard machine language instruction, which component identifies the specific operation to be performed, such as addition or data movement?
A. OperandB. OpcodeC. RegisterD. Immediate AddresseasyAsked in NIMCET 2026View solution › - Q3.
Which register in a CPU holds the address of the next instruction to be executed?
A. Program CounterB. AccumulatorC. Instruction RegisterD. Stack PointereasyAsked in MAH MCA CET 2025View solution › - Q4.
What does the term RISC stand for in computer architecture?
A. Reduced Instruction Set ComputerB. Recursive Instruction Set CompilerC. Random Integrated System CompilerD. Registered Instruction Set ComputereasyAsked in MAH MCA CET 2025View solution › - Q5.
Which of the following registers is used to keep track of the address of the memory location where the next instruction is located?
A. Memory Data RegisterB. Memory Address RegisterC. Program CounterD. Instruction CountereasyAsked in NIMCET 2023View solution › - Q6.
The time required for fetching and executing one machine instruction is
A. Seek timeB. Real timeC. Delay timeD. CPU cycleeasyAsked in NIMCET 2023View solution › - Q7.
The time required for fetching and execution of one simple machine instruction is known as
A. Delay timeB. CPU cycleC. Real TimeD. Seek TimeeasyAsked in NIMCET 2020View solution › - Q8.
The process in which the processor fetches or decodes another instruction during the execution of the current instruction is called
A. Super computingB. PipeliningC. Cloud ComputingD. AccumulatorseasyAsked in NIMCET 2021View solution › - Q9.
Which of the following is used by ALU to store the intermediate results?
A. StackB. HeapC. RegistersD. AccumulatorseasyAsked in NIMCET 2021View solution › - Q10.
Consider a computer system with a speed of instructions per second. A program P, having steps, is run on this system, where is the input size. If , what is the execution time for P?
A. 1.2 secondsB. 20 secondsC. 100 secondsD. 200 secondseasyAsked in NIMCET 2021View solution ›